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| Wait state in Storage Devices | ||
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> Wait state in Storage Devices A wait state is a delay which is experienced by a computer processor when accessing external memory or another device. Computer microprocessors are very fast, while memory technology does not seem to be able to catch the processors. The processors run with a clock of several GHz, while the main memory clock ranges from 233 to 400 MHz. When the processor needs to access external memory, it starts placing the address of the requested information on the address bus. It then must wait for the answer that may come back tens if not hundreds of cycles later. The cycles spent waiting is called a wait state. There is various wait state codes for the request cycles. Some of the codes are briefly explained as follows: If an Input Output operation is not imitated then the operational response was received from a SIO instruction; CSW was not stored; channel was not busy. 004 IPL: Whenever CSW in not stored; channel will be busy after execution of a Test I/O instruction. 005 IPL: It is used to for unit check caused an I/O interruption; the first four unit-check sense bytes are placed in location. 006 IPL: This is an operation which is used as an interface control check, or channel control check, or channel data check, or program check, or channel chaining check occurred. 007 NIP: A console was not available. The important wait state instruction is 00ANIP: This is the entry for the dataset to find a retrievable data from the system. 00B, this is another important wait code which is used to master scheduler during initialization; a dump was taken to the dataset. 00C IPL: It is an active nucleus member is not edited in the scatter format; the nucleus cannot be loaded. 00D It is the master scheduler terminated abnormally during initialization; no dump was taken. 00F IPL: This volume is used to contain the text. 013 NIP: The error has occurred while recovery was not possible. The code 014 is used for recursive translation exceptions occurred due to incorrect initialization, or overlaying of the master address space segment tables or common page. The code 029 is used for the time-of-day clock is in error. The code 02A is used to signal the other processor. The processor did not appear to exist. The code 02B is used for if the hardware could not signal the other processor, because the other processor has experienced a similar problem and was the first processor to enter the 02A wait state. The 02D is an unconditional mount was issued requesting a Mass Storage System device which is not supported during NIP. The 02E ASM can no longer access a required page due to an unusual number of permanent I/O errors. The 02F code is used for direct access device containing a page dataset is unavailable for an I/O operation. A 030 NIP is used for unanticipated request for abnormal task termination (ABEND) has occurred. The 031 NIP is used for volume resides on a unit for which there is no UCB. The 032 NIP is used for module which is not found in the SYS1.NUCLEUS dataset by BLDL. The 033 NIP is used when an I/O error occurred. The 034 is used when the operating system is incompatible with the processor. There are many more wait state codes for the storage system. These codes help in understanding how the processor can access to the external storage device. |
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